WIRKAM BLOG: IC TTL

7400

Quad 2-input NAND gates.

+---+--+---+             +---+---*---+           __
 1A |1  +--+ 14| VCC         | A | B |/Y |      /Y = AB
 1B |2       13| 4B          +===+===*===+
/1Y |3       12| 4A          | 0 | 0 | 1 |
 2A |4  7400 11| /4Y         | 0 | 1 | 1 |
 2B |5       10| 3B          | 1 | 0 | 1 |
/2Y |6        9| 3A          | 1 | 1 | 0 |
GND |7        8| /3Y         +---+---*---+
    +----------+

Positive Logic

__
 Y = AB

Equivalent Chips

SN5400 (J)
SN54H00 (J)
SN54L00 (J)
SN54LS00 (J,W)
SN54S00 (J,W)
SN7400 (J,N)
SN74H00 (J,N)
SN74L00 (J,N)
SN74LS00 (J,N)
SN47S00 (J,N)

7401

Quad 2-input open-collector NAND gates.

+---+--+---+             +---+---*---+           __
/1Y |1  +--+ 14| VCC         | A | B |/Y |      /Y = AB
 1A |2       13| /4Y         +===+===*===+
 1B |3       12| 4B          | 0 | 0 | Z |
/2Y |4  7401 11| 4A          | 0 | 1 | Z |
 2A |5       10| /3Y         | 1 | 0 | Z |
 2B |6        9| 3B          | 1 | 1 | 0 |
GND |7        8| 3A          +---+---*---+
    +----------+

7402

Quad 2-input NOR gates.

+---+--+---+             +---+---*---+           ___
/1Y |1  +--+ 14| VCC         | A | B |/Y |      /Y = A+B
 1A |2       13| /4Y         +===+===*===+
 1B |3       12| 4B          | 0 | 0 | 1 |
/2Y |4  7402 11| 4A          | 0 | 1 | 0 |
 2A |5       10| /3Y         | 1 | 0 | 0 |
 2B |6        9| 3B          | 1 | 1 | 0 |
GND |7        8| 3A          +---+---*---+
    +----------+

7403

Quad 2-input open-collector NAND gates.

+---+--+---+             +---+---*---+           __
 1A |1  +--+ 14| VCC         | A | B |/Y |      /Y = AB
 1B |2       13| 4B          +===+===*===+
/1Y |3       12| 4A          | 0 | 0 | Z |
 2A |4  7403 11| /4Y         | 0 | 1 | Z |
 2B |5       10| 3B          | 1 | 0 | Z |
/2Y |6        9| 3A          | 1 | 1 | 0 |
GND |7        8| /3Y         +---+---*---+
    +----------+

7404

Hex inverters.

+---+--+---+             +---*---+               _
 1A |1  +--+ 14| VCC         | A |/Y |          /Y = A
/1Y |2       13| 6A          +===*===+
 2A |3       12| /6Y         | 0 | 1 |
/2Y |4  7404 11| 5A          | 1 | 0 |
 3A |5       10| /5Y         +---*---+
/3Y |6        9| 4A
GND |7        8| /4Y
    +----------+

Positive Logic

_
 Y = A

Equivalent Chips

SN5404 (J)
SN54H04 (J)
SN54L04 (J)
SN54LS04 (J,W)
SN54S04 (J,W)
SN7404 (J,N)
SN74H04 (J,N)
SN74L04 (J,N)
SN74LS04 (J,N)
SN47S04 (J,N)

7405

Hex open-collector inverters.

+---+--+---+             +---*---+               _
 1A |1  +--+ 14| VCC         | A |/Y |          /Y = A
/1Y |2       13| 6A          +===*===+
 2A |3       12| /6Y         | 0 | Z |
/2Y |4  7405 11| 5A          | 1 | 0 |
 3A |5       10| /5Y         +---*---+
/3Y |6        9| 4A
GND |7        8| /4Y
    +----------+

7406

Hex open-collector high-voltage inverters.
Maximum output voltage is 30V.

+---+--+---+             +---*---+               _
 1A |1  +--+ 14| VCC         | A |/Y |          /Y = A
/1Y |2       13| 6A          +===*===+
 2A |3       12| /6Y         | 0 | Z |
/2Y |4  7406 11| 5A          | 1 | 0 |
 3A |5       10| /5Y         +---*---+
/3Y |6        9| 4A
GND |7        8| /4Y
    +----------+

7407

Hex open-collector high-voltage buffers.
Maximum output voltage is 30V.

+---+--+---+             +---*---+
 1A |1  +--+ 14| VCC         | A | Y |           Y = A
 1Y |2       13| 6A          +===*===+
 2A |3       12| 6Y          | 0 | 0 |
 2Y |4  7407 11| 5A          | 1 | Z |
 3A |5       10| 5Y          +---*---+
 3Y |6        9| 4A
GND |7        8| 4Y
    +----------+

7408

Quad 2-input AND gates.

+---+--+---+             +---+---*---+
 1A |1  +--+ 14| VCC         | A | B | Y |       Y = AB
 1B |2       13| 4B          +===+===*===+
 1Y |3       12| 4A          | 0 | 0 | 0 |
 2A |4  7408 11| 4Y          | 0 | 1 | 0 |
 2B |5       10| 3B          | 1 | 0 | 0 |
 2Y |6        9| 3A          | 1 | 1 | 1 |
GND |7        8| 3Y          +---+---*---+
    +----------+

Positive Logic

 Y = AB

7409

Quad 2-input open-collector AND gates.

+---+--+---+             +---+---*---+
 1A |1  +--+ 14| VCC         | A | B | Y |       Y = AB
 1B |2       13| 4B          +===+===*===+
 1Y |3       12| 4A          | 0 | 0 | 0 |
 2A |4  7409 11| 4Y          | 0 | 1 | 0 |
 2B |5       10| 3B          | 1 | 0 | 0 |
 2Y |6        9| 3A          | 1 | 1 | Z |
GND |7        8| 3Y          +---+---*---+
    +----------+

7410

Triple 3-input NAND gates.

+---+--+---+             +---+---+---*---+       ___
 1A |1  +--+ 14| VCC         | A | B | C |/Y |  /Y = ABC
 1B |2       13| 1C          +===+===+===*===+
 2A |3       12| /1Y         | 0 | X | X | 1 |
 2B |4  7410 11| 3C          | 1 | 0 | X | 1 |
 2C |5       10| 3B          | 1 | 1 | 0 | 1 |
/2Y |6        9| 3A          | 1 | 1 | 1 | 0 |
GND |7        8| /3Y         +---+---+---*---+
    +----------+

Positive Logic

___
 Y = ABC

7411

Triple 3-input AND gates.

+---+--+---+             +---+---+---*---+
 1A |1  +--+ 14| VCC         | A | B | C | Y |   Y = ABC
 1B |2       13| 1C          +===+===+===*===+
 2A |3       12| 1Y          | 0 | X | X | 0 |
 2B |4  7411 11| 3C          | 1 | 0 | X | 0 |
 2C |5       10| 3B          | 1 | 1 | 0 | 0 |
 2Y |6        9| 3A          | 1 | 1 | 1 | 1 |
GND |7        8| 3Y          +---+---+---*---+
    +----------+

7412

Triple 3-input open-collector NAND gates.

+---+--+---+             +---+---+---*---+       ___
 1A |1  +--+ 14| VCC         | A | B | C |/Y |  /Y = ABC
 1B |2       13| 1C          +===+===+===*===+
 2A |3       12| /1Y         | 0 | X | X | Z |
 2B |4  7410 11| 3C          | 1 | 0 | X | Z |
 2C |5       10| 3B          | 1 | 1 | 0 | Z |
/2Y |6        9| 3A          | 1 | 1 | 1 | 0 |
GND |7        8| /3Y         +---+---+---*---+
    +----------+

7413

Dual 4-input NAND gates with schmitt-trigger inputs.
0.8V typical input hysteresis at VCC=+5V.

+---+--+---+             +---+---+---+---*---+        ____
 1A |1  +--+ 14| VCC         | A | B | C | D |/Y |   /Y = ABCD
 1B |2       13| 2D          +===+===+===+===*===+
    |3       12| 2C          | 0 | X | X | X | 1 |
 1C |4  7413 11|             | 1 | 0 | X | X | 1 |
 1D |5       10| 2B          | 1 | 1 | 0 | X | 1 |
/1Y |6        9| 2A          | 1 | 1 | 1 | 0 | 1 |
GND |7        8| /2Y         | 1 | 1 | 1 | 1 | 0 |
    +----------+             +---+---+---+---*---+

7414

Hex inverters with schmitt-trigger inputs.
0.8V typical input hysteresis at VCC=+5V.

+---+--+---+             +---*---+               _
 1A |1  +--+ 14| VCC         | A |/Y |          /Y = A
/1Y |2       13| 6A          +===*===+
 2A |3       12| /6Y         | 0 | 1 |
/2Y |4  7414 11| 5A          | 1 | 0 |
 3A |5       10| /5Y         +---*---+
/3Y |6        9| 4A
GND |7        8| /4Y
    +----------+

7415

Triple 3-input open-collector AND gates.

+---+--+---+             +---+---+---*---+
 1A |1  +--+ 14| VCC         | A | B | C | Y |   Y = ABC
 1B |2       13| 1C          +===+===+===*===+
 2A |3       12| 1Y          | 0 | X | X | 0 |
 2B |4  7415 11| 3C          | 1 | 0 | X | 0 |
 2C |5       10| 3B          | 1 | 1 | 0 | 0 |
 2Y |6        9| 3A          | 1 | 1 | 1 | Z |
GND |7        8| 3Y          +---+---+---*---+
    +----------+

7416

Hex open-collector high-voltage inverters.
Maximum output voltage is 15V.

+---+--+---+             +---*---+               _
 1A |1  +--+ 14| VCC         | A |/Y |          /Y = A
/1Y |2       13| 6A          +===*===+
 2A |3       12| /6Y         | 0 | Z |
/2Y |4  7416 11| 5A          | 1 | 0 |
 3A |5       10| /5Y         +---*---+
/3Y |6        9| 4A
GND |7        8| /4Y
    +----------+

7417

Hex open-collector high-voltage buffers.
Maximum output voltage is 15V.

+---+--+---+             +---*---+
 1A |1  +--+ 14| VCC         | A | Y |          Y = A
 1Y |2       13| 6A          +===*===+
 2A |3       12| 6Y          | 0 | 0 |
 2Y |4  7417 11| 5A          | 1 | Z |
 3A |5       10| 5Y          +---*---+
 3Y |6        9| 4A
GND |7        8| 4Y
    +----------+

7418

Dual 4-input NAND gates with schmitt-trigger inputs.
0.8V typical input hysteresis at VCC=+5V.

+---+--+---+             +---+---+---+---*---+        ____
 1A |1  +--+ 14| VCC         | A | B | C | D |/Y |   /Y = ABCD
 1B |2       13| 2D          +===+===+===+===*===+
    |3       12| 2C          | 0 | X | X | X | 1 |
 1C |4  7418 11|             | 1 | 0 | X | X | 1 |
 1D |5       10| 2B          | 1 | 1 | 0 | X | 1 |
/1Y |6        9| 2A          | 1 | 1 | 1 | 0 | 1 |
GND |7        8| /2Y         | 1 | 1 | 1 | 1 | 0 |
    +----------+             +---+---+---+---*---+

7419

Hex inverters with schmitt-trigger line-receiver inputs.
0.8V typical input hysteresis at VCC=+5V.

+---+--+---+             +---*---+               _
 1A |1  +--+ 14| VCC         | A |/Y |          /Y = A
/1Y |2       13| 6A          +===*===+
 2A |3       12| /6Y         | 0 | 1 |
/2Y |4  7414 11| 5A          | 1 | 0 |
 3A |5       10| /5Y         +---*---+
/3Y |6        9| 4A
GND |7        8| /4Y
    +----------+

7420

Dual 4-input NAND gates.

+---+--+---+             +---+---+---+---*---+        ____
 1A |1  +--+ 14| VCC         | A | B | C | D |/Y |   /Y = ABCD
 1B |2       13| 2D          +===+===+===+===*===+
    |3       12| 2C          | 0 | X | X | X | 1 |
 1C |4  7420 11|             | 1 | 0 | X | X | 1 |
 1D |5       10| 2B          | 1 | 1 | 0 | X | 1 |
/1Y |6        9| 2A          | 1 | 1 | 1 | 0 | 1 |
GND |7        8| /2Y         | 1 | 1 | 1 | 1 | 0 |
    +----------+             +---+---+---+---*---+

7421

Dual 4-input AND gates.

+---+--+---+             +---+---+---+---*---+
 1A |1  +--+ 14| VCC         | A | B | C | D | Y |    Y = ABCD
 1B |2       13| 2D          +===+===+===+===*===+
    |3       12| 2C          | 0 | X | X | X | 0 |
 1C |4  7421 11|             | 1 | 0 | X | X | 0 |
 1D |5       10| 2B          | 1 | 1 | 0 | X | 0 |
 1Y |6        9| 2A          | 1 | 1 | 1 | 0 | 0 |
GND |7        8| 2Y          | 1 | 1 | 1 | 1 | 1 |
    +----------+             +---+---+---+---*---+

7422

Dual 4-input open-collector NAND gates.

+---+--+---+             +---+---+---+---*---+        ____
 1A |1  +--+ 14| VCC         | A | B | C | D |/Y |   /Y = ABCD
 1B |2       13| 2D          +===+===+===+===*===+
    |3       12| 2C          | 0 | X | X | X | Z |
 1C |4  7422 11|             | 1 | 0 | X | X | Z |
 1D |5       10| 2B          | 1 | 1 | 0 | X | Z |
/1Y |6        9| 2A          | 1 | 1 | 1 | 0 | Z |
GND |7        8| /2Y         | 1 | 1 | 1 | 1 | 0 |
    +----------+             +---+---+---+---*---+

7424

Quad 2-input NAND gates with schmitt-trigger line-receiver inputs.
0.8V typical input hysteresis at VCC=+5V.

+---+--+---+             +---+---*---+           __
 1A |1  +--+ 14| VCC         | A | B |/Y |      /Y = AB
 1B |2       13| 4B          +===+===*===+
/1Y |3       12| 4A          | 0 | 0 | 1 |
 2A |4  7424 11| /4Y         | 0 | 1 | 1 |
 2B |5       10| 3B          | 1 | 0 | 1 |
/2Y |6        9| 3A          | 1 | 1 | 0 |
GND |7        8| /3Y         +---+---*---+
    +----------+

7425

Dual 4-input NOR gates with enable input.

+---+--+---+                 __________
 1A |1  +--+ 14| VCC         Y = G(A+B+C+D)
 1B |2       13| 2D
 1G |3       12| 2C
 1C |4  7425 11| 2G
 1D |5       10| 2B
/1Y |6        9| 2A
GND |7        8| /2Y
    +----------+

7426

Quad 2-input open-collector high-voltage NAND gates.
Maximum output voltage is 15V.

+---+--+---+             +---+---*---+           __
 1A |1  +--+ 14| VCC         | A | B |/Y |      /Y = AB
 1B |2       13| 4B          +===+===*===+
/1Y |3       12| 4A          | 0 | 0 | Z |
 2A |4  7426 11| /4Y         | 0 | 1 | Z |
 2B |5       10| 3B          | 1 | 0 | Z |
/2Y |6        9| 3A          | 1 | 1 | 0 |
GND |7        8| /3Y         +---+---*---+
    +----------+

7427

Triple 3-input NOR gates.

+---+--+---+             +---+---+---*---+       _____
 1A |1  +--+ 14| VCC         | A | B | C |/Y |  /Y = A+B+C
 1B |2       13| 1C          +===+===+===*===+
 2A |3       12| /1Y         | 0 | 0 | 0 | 1 |
 2B |4  7427 11| 3C          | 0 | 0 | 1 | 0 |
 2C |5       10| 3B          | 0 | 1 | X | 0 |
/2Y |6        9| 3A          | 1 | X | X | 0 |
GND |7        8| /3Y         +---+---+---*---+
    +----------+

7428

Quad 2-input NOR gates with buffered outputs.

+---+--+---+             +---+---*---+           ___
/1Y |1  +--+ 14| VCC         | A | B |/Y |      /Y = A+B
 1A |2       13| /4Y         +===+===*===+
 1B |3       12| 4B          | 0 | 0 | 1 |
/2Y |4  7428 11| 4A          | 0 | 1 | 0 |
 2A |5       10| /3Y         | 1 | 0 | 0 |
 2B |6        9| 3B          | 1 | 1 | 0 |
GND |7        8| 3A          +---+---*---+
    +----------+

7430

8-input NAND gate.

+---+--+---+                 ________
  A |1  +--+ 14| VCC        /Y = ABCDEFGH
  B |2       13|
  C |3       12| H
  D |4  7430 11| G
  E |5       10|
  F |6        9|
GND |7        8| /Y
    +----------+

Positive Logic

________
 Y = ABCDEFGH

7431

Hex delay elements.
Typical delays are 27.5ns (1,6), 46.5ns (2,5), 6ns (3,4). Improved output currents IoH=-1.2mA, IoL=24mA for gates 3 and 4.

+---+--+---+                 _            _____
 1A |1  +--+ 16| VCC        /1Y=1A        /4Y=4A.4B
/1Y |2       15| 6A
 2A |3       14| /6Y         2Y=2A         5Y=5A
 2Y |4       13| 5A             _____          _
 3A |5  7431 12| 5Y         /3Y=3A.3B     /6Y=6A
 3B |6       11| 4B
/3Y |7       10| 4A
GND |8        9| /4Y
    +----------+

7432

Quad 2-input OR gates.

+---+--+---+             +---+---*---+
 1A |1  +--+ 14| VCC         | A | B | Y |       Y = A+B
 1B |2       13| 4B          +===+===*===+
 1Y |3       12| 4A          | 0 | 0 | 0 |
 2A |4  7432 11| 4Y          | 0 | 1 | 1 |
 2B |5       10| 3B          | 1 | 0 | 1 |
 2Y |6        9| 3A          | 1 | 1 | 1 |
GND |7        8| 3Y          +---+---*---+
    +----------+

Positive Logic

 Y = A+B

7433

Quad 2-input open-collector NOR gates.

+---+--+---+             +---+---*---+           ___
/1Y |1  +--+ 14| VCC         | A | B |/Y |      /Y = A+B
 1A |2       13| /4Y         +===+===*===+
 1B |3       12| 4B          | 0 | 0 | Z |
/2Y |4  7433 11| 4A          | 0 | 1 | 0 |
 2A |5       10| /3Y         | 1 | 0 | 0 |
 2B |6        9| 3B          | 1 | 1 | 0 |
GND |7        8| 3A          +---+---*---+
    +----------+

7437

Quad 2-input NAND gates with buffered output.

+---+--+---+             +---+---*---+           __
 1A |1  +--+ 14| VCC         | A | B |/Y |      /Y = AB
 1B |2       13| 4B          +===+===*===+
/1Y |3       12| 4A          | 0 | 0 | 1 |
 2A |4  7437 11| /4Y         | 0 | 1 | 1 |
 2B |5       10| 3B          | 1 | 0 | 1 |
/2Y |6        9| 3A          | 1 | 1 | 0 |
GND |7        8| /3Y         +---+---*---+
    +----------+

7438

Quad 2-input open-collector NAND gates with buffered output.

+---+--+---+             +---+---*---+           __
 1A |1  +--+ 14| VCC         | A | B |/Y |      /Y = AB
 1B |2       13| 4B          +===+===*===+
/1Y |3       12| 4A          | 0 | 0 | Z |
 2A |4  7438 11| /4Y         | 0 | 1 | Z |
 2B |5       10| 3B          | 1 | 0 | Z |
/2Y |6        9| 3A          | 1 | 1 | 0 |
GND |7        8| /3Y         +---+---*---+
    +----------+

7440

Dual 4-input NAND gates with buffered output.

+---+--+---+             +---+---+---+---*---+        ____
 1A |1  +--+ 14| VCC         | A | B | C | D |/Y |   /Y = ABCD
 1B |2       13| 2D          +===+===+===+===*===+
    |3       12| 2C          | 0 | X | X | X | 1 |
 1C |4  7440 11|             | 1 | 0 | X | X | 1 |
 1D |5       10| 2B          | 1 | 1 | 0 | X | 1 |
/1Y |6        9| 2A          | 1 | 1 | 1 | 0 | 1 |
GND |7        8| /2Y         | 1 | 1 | 1 | 1 | 0 |
    +----------+             +---+---+---+---*---+

7442

1-of-10 inverting decoder/demultiplexer.

+---+--+---+             +---+---+---+---*---+---+---+---+
/Y0 |1  +--+ 16| VCC         | S3| S2| S1| S0|/Y0|/Y1|...|/Y9|
/Y1 |2       15| S0          +===+===+===+===*===+===+===+===+
/Y2 |3       14| S1          | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 1 |
/Y3 |4       13| S2          | 0 | 0 | 0 | 1 | 1 | 0 | 1 | 1 |
/Y4 |5  7442 12| S3          | . | . | . | . | 1 | 1 | . | 1 |
/Y5 |6       11| /Y9         | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 0 |
/Y6 |7       10| /Y8         | 1 | 0 | 1 | X | 1 | 1 | 1 | 1 |
GND |8        9| /Y7         | 1 | 1 | X | X | 1 | 1 | 1 | 1 |
    +----------+             +---+---+---+---*---+---+---+---+

7446, 7447

Open-collector BCD to 7-segment decoder/common-anode LED driver with ripple blank input and output.
7446 has 30V outputs, 7447 has 15V outputs.

+---+--+---+
  A1 |1  +--+ 16| VCC
  A2 |2       15| /YF
 /LT |3       14| /YG
/RBO |4       13| /YA
/RBI |5  7447 12| /YB
  A3 |6       11| /YC
  A0 |7       10| /YD
 GND |8        9| /YE
     +----------+

7448

BCD to 7-segment decoder/common-cathode LED driver with ripple blank input and output.

+---+--+---+
  A1 |1  +--+ 16| VCC
  A2 |2       15| YF
 /LT |3       14| YG
/RBO |4       13| YA
/RBI |5  7448 12| YB
  A3 |6       11| YC
  A0 |7       10| YD
 GND |8        9| YE
     +----------+

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IC TTL

7400

Positive Logic

Equivalent Chips

7401

7402

7403

7404

Positive Logic

Equivalent Chips

7405

7406

7407

7408

Positive Logic

7409

7410

Positive Logic

7411

7412

7413

7414

7415

7416

7417

7418

7419

7420

7421

7422

7424

7425

7426

7427

7428

7430

Positive Logic

7431

7432

Positive Logic

7433

7437

7438

7440

7442

7446, 7447

7448

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